1. Field of the Invention
The present invention generally relates to a semiconductor device having a structure in which a semiconductor element on a substrate is sealed and a method for manufacturing such a semiconductor device.
2. Description of the Related Art
There are various types of elements formed or mounted on a substrate. In some cases, it is preferable to use elements in a sealed status on the substrate depending on the types of elements.
For example, Micro Electro Mechanical System (also referred to as MEMS) is used for such elements (hereafter referred to as MEMS elements), which are typical elements preferably used in a sealed status on a substrate in terms of structure.
Examples of such MEMS elements include pressure sensors, acceleration sensors, optical functional elements such as digital micromirror devices, and the like. Such MEMS elements are used preferably in a vacuum state or a decompressed state or in an atmosphere replaced with an inert gas and the elements are preferably used in a hermetically sealed status. In view of this, various methods for sealing MEMS elements have been proposed (refer to Patent Documents 1 to 4, for example)    Patent Document 1: Japanese Laid-Open Patent Application No. 8-316496    Patent Document 2: Japanese Laid-Open Patent Application No. 2005-19966    Patent Document 3: Japanese Laid-Open Patent Application No. 2000-141300    Patent Document 4: Japanese Laid-Open Patent Application No. 2002-246489
However, as disclosed in the above-mentioned Patent Documents 1 and 2 (Japanese Laid-Open Patent Application No. 8-316496 and Japanese Laid-Open Patent Application No. 2005-19966) for example, methods including mechanical processing of silicon wafers in which an element is sealed by laminating silicon wafers, for example, are problematic in that the form of silicon wafers for sealing the element becomes complicated and the processing of such silicon wafers requires costs and time.
Further, as disclosed in the above-mentioned Patent Documents 3 and 4 (Japanese Laid-Open Patent Application No. 2000-141300 and Japanese Laid-Open Patent Application No. 2002-246489) for example, when a structure for sealing the element is formed with solder, it poses a problem in that components of flux and the like included in solder are diffused in a sealed space. Also, bonding using such solder includes a reflow step for increasing the temperature of solder, so that a problem such as contamination of flux, for example, in a sealed space is likely to be caused.